PCB wiring is very important in the entire PCB design. It is worth studying and learning how to achieve fast and efficient wiring while making your PCB wiring look high-end.

1. Common ground processing of digital circuits and analog circuits

Nowadays, many PCBs are no longer single function circuits (digital or analog circuits), but are composed of a mixture of digital and analog circuits. Therefore, when wiring, it is necessary to consider the issue of mutual interference between them, especially the noise interference on the ground wire. The frequency of digital circuits is high, and the sensitivity of analog circuits is strong. For signal lines, high-frequency signal lines should be kept as far away as possible from sensitive analog circuit components. For ground lines, the entire PCB has only one node to the outside world, so it is necessary to handle the problem of shared ground between digital and analog circuits inside the PCB. However, the digital ground and analog ground inside the board are actually separate and not connected to each other, only at the interface between the PCB and the outside world (such as plugs, etc.). There is a short circuit between the digital ground and the analog ground, please note that there is only one connection point. There are also those that do not share the same ground on the PCB, which is determined by the system design.

2. Signal lines are laid on the electrical (ground) layer

When wiring multi-layer printed circuit boards, there are not many lines left in the signal layer that have not been fully laid. Adding more layers will cause waste and increase production workload, and the cost will also increase accordingly. To solve this contradiction, it is possible to consider wiring on the electrical (ground) layer. Firstly, the use of power layers should be considered, followed by geological layers. Because it is best to preserve the integrity of the geological strata.

3. Handling of Connecting Legs in Large Area Conductors

In large-area grounding (electrical), the legs of commonly used components are connected to them, and the treatment of the connecting legs needs to be comprehensively considered. In terms of electrical performance, it is better to fully connect the solder pads of the component legs to the copper surface. However, there are some hidden dangers in the welding assembly of the components, such as: ① Welding requires a high-power heater. ② Easy to cause virtual solder joints. Therefore, taking into account both electrical performance and process requirements, cross shaped solder pads are made, known as heat shields or thermal pads. This greatly reduces the possibility of virtual solder joints caused by excessive heat dissipation in the cross-section during welding. The treatment of the grounding layer legs of multi-layer boards is the same.

4. The role of network systems in cabling

In many CAD systems, wiring is determined based on the network system. The grid is too dense, although the number of paths has increased, the step size is too small, and the amount of data in the graph field is too large. This inevitably requires higher storage space for the equipment, and also has a great impact on the computing speed of computer electronic products. And some pathways are invalid, such as those occupied by the solder pads of component legs or by mounting holes or fixed holes. The grid is too sparse and there are too few pathways, which greatly affects the distribution rate. So there needs to be a reasonable grid system to support the routing process. The distance between the legs of standard components is 0.1 inches (2.54mm), so the basis of grid systems is generally set at 0.1 inches (2.54mm) or multiples of less than 0.1 inches, such as 0.05 inches, 0.025 inches, 0.02 inches, etc.

5. Handling of power and ground wires

Even if the wiring in the entire PCB board is well done, interference caused by inadequate consideration of power and ground can lead to a decrease in product performance, and sometimes even affect the success rate of the product. So the wiring of power and ground wires should be taken seriously, and the noise interference generated by power and ground wires should be minimized to ensure the quality of the product. For every engineer engaged in electronic product design, they understand the reasons for the noise generated between the ground wire and the power line. Now, we only describe the noise reduction method: it is well known to add a coupling capacitor between the power and ground wires. Try to widen the width of the power supply and ground wire as much as possible, preferably the ground wire is wider than the power line width. Their relationship is: ground wire>power line>signal line. The typical signal line width is 0.2-0.3mm, and the finest width can reach 0.05-0.07mm. The power line is 1.2-2.5mm. For digital circuit PCBs, a wide ground wire can be used to form a circuit, that is, to form a ground grid for use (analog circuit ground cannot be used in this way). Use a large area of copper layer as the ground wire, and connect unused areas on the printed circuit board to the ground as the ground wire. Or it can be made into a multi-layer board, with power and ground wires occupying one layer each.

6. Design Rule Check (DRC)

After the wiring design is completed, it is necessary to carefully check whether the wiring design complies with the rules formulated by the designer, and also confirm whether the formulated rules meet the requirements of the printed board production process. Generally, the following aspects are checked: whether the distance between lines, lines and component pads, lines and through holes, component pads and through holes, and between through holes is reasonable and meets production requirements. Is the width of the power and ground wires appropriate, and is there tight coupling (low wave impedance) between the power and ground wires? Is there any place in the PCB where the ground wire can be widened. Have the best measures been taken for key signal lines, such as minimizing length, adding protective lines, and clearly separating input and output lines. Do the analog circuit and digital circuit parts have independent ground wires. Will the graphics (such as icons and labels) added to the PCB cause signal short circuits. Modify some unsatisfactory lines. Is there a process line added on the PCB? Whether the solder mask meets the requirements of the production process, whether the solder mask size is appropriate, and whether the character markings are pressed on the device pads to avoid affecting the quality of the electrical assembly. Is the outer edge of the power layer in the multi-layer board reduced? If the copper foil of the power layer is exposed outside the board, it is easy to cause a short circuit.

7. Design of via

Via is one of the important components of multi-layer PCB, and the cost of drilling holes usually accounts for 30% to 40% of the PCB manufacturing cost. Simply put, every hole on a PCB can be called a via. From a functional perspective, vias can be divided into two categories: one is used for electrical connections between layers; The second is used for fixing or positioning devices. If we talk about the manufacturing process, vias are generally divided into three categories: blind via, buried via, and through via.

Blind holes are located on the top and bottom surfaces of printed circuit boards, with a certain depth, used for connecting surface circuits and underlying inner circuits. The depth of the holes usually does not exceed a certain ratio (aperture). Buried hole refers to the connection hole located in the inner layer of the printed circuit board, which does not extend to the surface of the circuit board. The above two types of holes are located in the inner layer of the circuit board and are completed using through-hole forming technology before lamination. During the through-hole formation process, several inner layers may overlap and be made. The third type is called a through-hole, which passes through the entire circuit board and can be used for internal interconnection or as a mounting and positioning hole for components. Due to its easier implementation and lower cost in the manufacturing process, through holes are widely used in most printed circuit boards without the need for the other two types of through holes. The vias mentioned below, unless otherwise specified, are considered as through holes.

1、 From a design perspective, a via mainly consists of two parts: a drill hole in the middle and a pad area around the drill hole. The size of these two parts determines the size of the via hole. Obviously, in high-speed and high-density PCB design, designers always hope that the smaller the via, the better, so that there can be more wiring space on the board. In addition, the smaller the via, the smaller its own parasitic capacitance, making it more suitable for high-speed circuits. However, the reduction in hole size also brings about an increase in cost, and the size of through holes cannot be reduced without restrictions. It is limited by processes such as drilling and plating: the smaller the hole, the longer it takes to drill and the easier it is to deviate from the center position; And when the depth of the hole exceeds 6 times the diameter of the borehole, it cannot be guaranteed that the hole wall can be uniformly plated with copper. For example, the thickness (through-hole depth) of a normal 6-layer PCB board is about 50mil, so the minimum drilling diameter that PCB manufacturers can provide can only reach 8Mil.

2、 The parasitic capacitance of the via itself has a parasitic capacitance to ground. If the diameter of the isolation hole on the ground layer of the via is D2, the diameter of the via pad is D1, the thickness of the PCB board is T, and the dielectric constant of the board substrate is ε, then the parasitic capacitance of the via is approximately C="1". 41 ε TD1/(D2-D1). The parasitic capacitance of the via will mainly affect the circuit by prolonging the rise time of the signal and reducing the speed of the circuit. For example, for a PCB board with a thickness of 50mil, if a through-hole with an inner diameter of 10Mil and a pad diameter of 20Mil is used, and the distance between the pad and the ground copper area is 32mil, we can approximately calculate the parasitic capacitance of the through-hole using the above formula as C=1.41x4.4x0.050x0.020/(0.032-0.020)=0.517pF. The rise time change caused by this capacitance is T10-90=2.2C (Z0/2)=2.2x0.517x (55/2)=31.28ps. From these values, it can be seen that although the effect of the rise delay caused by the parasitic capacitance of a single via is not very obvious, designers still need to carefully consider if multiple vias are used for interlayer switching in the wiring.

3、 The parasitic inductance of via holes is the same. In the design of high-speed digital circuits, the harm caused by parasitic inductance of via holes is often greater than the impact of parasitic capacitance. Its parasitic series inductance will weaken the contribution of bypass capacitors and weaken the filtering effectiveness of the entire power system. We can simply calculate the parasitic inductance of a via approximation using the following formula: L="5". 08h [ln (4h/d)+1], where L refers to the inductance of the via, h is the length of the via, and d is the diameter of the central borehole. From the equation, it can be seen that the diameter of the via has a relatively small impact on the inductance, while the length of the via has the greatest impact on the inductance. Still using the above example, the inductance of the via can be calculated as L=5.08x0.050 [ln (4x0.050/0.010)+1]=1.015nH. If the rise time of the signal is 1ns, then its equivalent impedance size is XL=π L/T10-90=3.19 Ω. This impedance cannot be ignored in the presence of high-frequency currents. It is particularly important to note that the bypass capacitor needs to pass through two vias when connecting the power layer and the ground layer, which will double the parasitic inductance of the vias.

4、 Through the analysis of the parasitic characteristics of vias in high-speed PCB design, we can see that seemingly simple vias often have significant negative effects on circuit design. In order to reduce the adverse effects of parasitic effects on vias, efforts can be made in the design to:

1. Considering both cost and signal quality, choose a reasonable size for the via hole. For example, for the PCB design of memory modules with 6-10 layers, it is better to use 10/20Mil (drill/pad) vias. For some high-density small-sized boards, 8/18mil vias can also be tried. Under current technological conditions, it is difficult to use smaller sized vias. For power or ground vias, larger sizes can be considered to reduce impedance.

2. The two formulas discussed above indicate that using thinner PCB boards is beneficial in reducing the two parasitic parameters of vias.

3. The signal routing on the PCB board should avoid changing layers as much as possible, that is to say, unnecessary vias should be avoided as much as possible.

4. The pins of the power supply and ground should be punched nearby, and the shorter the lead between the via and the pin, the better, because they will cause an increase in inductance. At the same time, the power and ground leads should be as thick as possible to reduce impedance.

5. Place some grounding vias near the signal switching layer to provide the nearest circuit for the signal. Even a large number of extra grounding vias can be placed on the PCB board. Of course, flexibility and versatility are also required during design. The through-hole model discussed earlier is the case where each layer has solder pads, and sometimes we can reduce or even remove the solder pads of certain layers. Especially in cases where the via density is very high, it may lead to the formation of a circuit breaker in the copper layer. To solve this problem, in addition to moving the position of the via, we can also consider reducing the size of the via pad in the copper layer.